1. Field of the Invention
The present invention relates to a charged particle beam writing method and a charged particle beam writing apparatus. For example, it relates to a writing method and a writing apparatus employed when writing patterns of a plurality of chips having different writing conditions onto a target workpiece.
2. Description of Related Art
The microlithography technique which advances microminiaturization of semiconductor devices is extremely important as being the unique process whereby patterns are formed in the semiconductor manufacturing. In recent years, with the high integration of LSI, the line width (critical dimension) required for semiconductor device circuits is decreasing year by year. In order to form a desired circuit pattern on semiconductor devices, a master or “original” pattern (also called a mask or a reticle) of high precision is needed. Then, the electron beam writing technique intrinsically having excellent resolution is used for producing such a highly precise master pattern.
FIG. 9 is a schematic diagram for illustrating operations of a variable-shaped electron beam (EB) writing apparatus. As shown in the figure, the variable-shaped electron beam writing apparatus operates as follows: A first aperture plate 410 has a quadrangular such as rectangular opening 411 for shaping an electron beam 330. A second aperture plate 420 has a variable-shaped opening 421 for shaping the electron beam 330 that passed through the opening 411 into a desired rectangular shape. The electron beam 330 emitted from a charged particle source 430 and having passed through the opening 411 is deflected by a deflector to pass through a part of the variable-shaped opening 421 and thereby to irradiate a target workpiece or “sample” 340 mounted on a stage which continuously moves in one predetermined direction (e.g. X direction) during writing or “drawing”. In other words, a rectangle shape as a result of passing through both the opening 411 and the variable-shaped opening 421 is written in the writing region of the target workpiece 340 on the stage. This method of shaping a given shape by letting beams pass through both the opening 411 of the first aperture plate 410 and the variable-shaped opening 421 of the second aperture plate 420 is referred to as a Variable Shaped Beam (VSB) system.
It is generally performed to write patterns of a plurality of chips onto a mask being a target workpiece. Then, writing conditions may often vary depending upon the chips. For example, a certain chip is written by one-time writing (multiplicity=1), and another certain chip is written by multiple writing (e.g., multiplicity=2) while the position of a boundary between stripe regions is shifted (refer to, e.g., Japanese Patent Application Laid-open (JP-A) No. 11-274036). Conventionally, in the electron beam pattern writing apparatus, when writing patterns of a plurality of chips onto a mask, a writing group is configured by collecting chips whose writing conditions with respect to layout within a certain range are identical with each other, and then writing is performed for each writing group. Thus, when writing is performed in one writing group, the writing is carried out under the same writing conditions.
FIG. 10 is a schematic diagram for illustrating writing groups and a writing order. FIG. 10 illustrates the case where three chips A, B, and C are arranged as shown in the figure. In this case, chip A and chip B are written with multiplicity 1, and chip C is written with multiplicity 2. That is, chips A and B having the same writing conditions configure a writing group G1, and chip C configures a writing group G2. In the writing group G1, merge processing is performed on chips A and B, and the merged region is divided into stripe regions of a predetermined height. The case of dividing the merged region into two stripes of the stripe G1S1 and the stripe G1S2 is shown in FIG. 10. On the other hand, in the writing group G2, the region of chip C is divided into stripe regions of a predetermined height. Since chip C is written with multiplicity 2, two stripe layers are configured: a stripe layer for the first time writing, and another stripe layer for the second time writing which is divided at the location shifted by half the stripe height. That is, they are stripes G2S1 and G2S2, and stripes G′ 2S1 to G′ 2S3. Thus, in FIG. 10, the writing group G2 is divided into five stripes. When writing, the two stripes of the writing group G1 are firstly written in order. Then, after having written all the stripes of the writing group G1, the five stripes of the writing group G2 are written in order.
As described above, when writing is performed for each writing group, one writing processing is completed by firstly writing the two stripes of the writing group G1 in order and then writing all the stripes of the writing group G1. Then, writing processing of the writing group G2 is started. Thus, the writing is performed treating a writing group as a unit of writing processing. Therefore, it is necessary to have a fixed time needed for information generation between the writing processing, and a processing time, such as an initialization time, needed between the writing processing. Furthermore, since writing of the writing group G2 starts after having completed the writing of all the stripes of the writing group G1 and having returned to the writing starting position of the writing group G2, it is necessary to have a time for moving the stage with a target workpiece thereon from the final position of the writing group G1 to the starting position of the writing group G2. If this distance between the final position and the starting position is long, the stage movement time also becomes long in accordance with the distance. Since such time is added to the writing time, there is a problem causing a delay of writing time as a whole. Particularly, if the number of chips having different writing conditions increases, since the number of writing groups also increases according to it, each above-mentioned time becomes necessary in accordance with the increase of the number of writing groups, thereby further causing a delay of the writing time.